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EEE232   HDL-Based Design & Programmable Logic   (10 credits)

 
Year Running: 2021/2022
Credit level: F5

Description

Provide a comprehensive overview of Hardware Description Languages focusing on the modelling, simulation and synthesis of digital logic circuits. Continue through to the extension of HDLs for system design and verification of System on Chip (SOC) designs. Provide an overview of target technologies, in particular programmable logic and FPGA. Emphasis will be on Verilog as commercial processor cores (ARM, MIPS) are only available in Verilog. Comparisons with VHDL will be made at all stages.

 

Reading List


Please click here for reading list.
 

Teaching Methods

Delivery Type Hours
Independent 60.0
Lab 16.0
Lecture 24.0
 

Methods of assessment

Assessment Type Duration % of formal assessment Semester
Course Work 0.0 50 % S2
Other 0.0 50 % S2
 

Teaching methods and assessment displayed on this page are indicative for 2021-22.